File:1st order type 1 loop.pdf
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| Description |
English: 3 examples of block diagrams of 1st order type 1 Phase-locked loops intended for use inside CDR circuits.
The equation of each block is present. |
| Date | |
| Source | Own work |
| Author | BORGATO Pierandrea |
This figure is meant to replace an older one, uploaded in 2009 into the Wikibooks site (CDR_architecture_or1_ty1_uf_nofilt.png ). It corrects a minor mistake, offers one more example, and is more consistent with the other figures in the Wikibook "Clock and data recovery".
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 20:22, 5 November 2011 |  | 1,754 × 843 (45 KB) | BORGATO Pierandrea (talk | contribs) |
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