Category:Shift registers

<nowiki>Registro de desplazamiento; Shift regiszter; Desplazamendu-erregistro; registre a decalatge; Schieberegister; شیفت رجیستر; 移位寄存器; Skifteregister; シフトレジスタ; Skiftregister; אוגר זיזה; 移位寄存器; 시프트 레지스터; ŝovdateningo; posuvný registr; Shift register; Registro a scorrimento; registre à décalage; Nihkeregister; registrador de deslocamento; Pomerački registar; schuifregister; 移位寄存器; ชิฟต์เรจิสเตอร์; Rejestr przesuwający; skiftregister; Sürüşdürmə registri; Регістр зсуву; 移位寄存器; Thanh ghi dịch; 移位暫存器; shift register; سجل الإزاحة; καταχωρητής ολίσθησης; поместувачки регистар; cascade of flip-flops sharing the same clock, in which the output of each flip-flop is connected to the input of the next flip-flop in the chain, resulting in a circuit that shifts by one position the bit array stored in it; logisches Schaltwerk; אוגר המיושם על ידי שרשור של דלגלגים בעלי אות שעון משותף, אשר הפלט של כל אחד מהם, חוץ מהאחרון, מחובר לקלט של הדלגלג שאחריו, ומהווים מעגל אשר מזיז בעמדה אחת את מערך הסיביות החד־ממדי המאוחסן בתוכו; schakeling van flipflops; Registro de corrimiento; Registro electronico; registre a decalage; ชิปรีจิสเตอร์; ShiftRegister; ตัวเลื่อนข้อมูล; Shift register; ชิฟต์รีจิสเตอร์; Dekalaje erregistro; Dekalaje-erregistro; Desplazamendu erregistro; אוגר הזזה; Rejestr przesuwny; 쉬프트 레지스터; مسجل الازاحة; سجل الإزاحة; مسجلات الإزاحة; مسجلات الإزاحة باتجاهين; مسجل الإزاحه; ŝovregistro; Kruhový čítač; Registry posuvné; Bit shift; Shift register</nowiki>

shift register

cascade of flip-flops sharing the same clock, in which the output of each flip-flop is connected to the input of the next flip-flop in the chain, resulting in a circuit that shifts by one position the bit array stored in it

Dual 4-Stage Static Shift Register (with serial input/parallel output)

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Authority file
Q746165 GND ID: 4124131-9 Library of Congress authority ID: sh85121409 BabelNet ID: 00071064n National Library of Israel J9U ID: 987007538859905171
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Subcategories

This category has the following 24 subcategories, out of 24 total.

4

4006 (CMOS)‎ (8 F)
4014 (CMOS)‎ (2 F)
4015 (CMOS)‎ (10 F)
4021 (CMOS)‎ (2 F)
4034 (CMOS)‎ (2 F)
4035 (CMOS)‎ (4 F)
4094 (CMOS)‎ (7 F)

7

7491‎ (3 F)
7495‎ (10 F)
7496‎ (2 F)
74164‎ (12 F)
74165‎ (2 F)
74166‎ (6 F)
74194‎ (1 F)
74195‎ (3 F)
74198‎ (1 F)
74295‎ (2 F)
74299‎ (2 F)
74322‎ (1 F)
74594‎ (2 F)
74595‎ (1 C, 10 F)
74597‎ (1 F)

L

Linear Feedback Shift Registers‎ (32 F)

R

Ring counters‎ (2 C, 8 F)

Media in category "Shift registers"

The following 95 files are in this category, out of 95 total.

3 bit bi-directional shift register circuit.svg 957 × 496; 11 KB
3 bit bi-directional shift register symbol.svg 461 × 390; 5 KB
3 bit right to left shift register circuit.svg 709 × 354; 5 KB
3 bit right to left shift register symbol.svg 319 × 177; 2 KB
3 bit shif tregister.jpg 454 × 164; 8 KB
3 bit universal shift register.svg 496 × 461; 6 KB
3-битовый FCSR.png 696 × 360; 12 KB
3bits lfsr internal xor.gif 180 × 92; 694 bytes
3bits lfsr.gif 137 × 90; 647 bytes
4 Bit Shift register (Simple 2) Clock.svg 420 × 300; 15 KB
4 Bit Shift register (Simple 2) Data.svg 420 × 300; 15 KB
4 Bit Shift register (Simple 2) FF1.svg 420 × 300; 14 KB
4 Bit Shift register (Simple 2) QA.svg 420 × 300; 14 KB
4 Bit Shift register (Simple 2).svg 420 × 300; 11 KB
4 Bit Shift register (Simple) Clock.svg 397 × 571; 18 KB
4 Bit Shift register (Simple) Data.svg 397 × 571; 15 KB
4 Bit Shift register (Simple) FF1.svg 397 × 571; 15 KB
4 Bit Shift register (Simple) QA.svg 397 × 571; 17 KB
4 Bit Shift register (Simple).svg 397 × 571; 13 KB
4 Bit Shift register (with Latch).svg 527 × 614; 20 KB
4 Bit Shift Register 001.svg 900 × 250; 18 KB
4 Bit Shift Register 002.svg 900 × 250; 20 KB
4 Bit Shift Register 003.svg 900 × 250; 26 KB
4 Bit Shift Register 004.svg 900 × 250; 29 KB
4 Bit Shift Register 005.svg 900 × 250; 28 KB
4 Bit Shift Register 006.svg 900 × 250; 29 KB
4 Bit Shift Register 007.svg 900 × 250; 29 KB
4 Bit Shift Register 008.svg 900 × 250; 29 KB
4 Bit Shift Register 009.svg 900 × 250; 29 KB
4 Bit Shift register with Parallel Load.svg 600 × 700; 23 KB
4 Bit Shift Register.svg 900 × 250; 14 KB
4-Bit PISO Shift Register Seq.gif 450 × 135; 7 KB
4-Bit PISO Shift Register.png 808 × 295; 23 KB
4-Bit SIPO Shift Register.png 413 × 141; 18 KB
4-Bit SIPO Shift Register.svg 512 × 180; 5 KB
Barrel shifter.svg 512 × 475; 33 KB
Crc shift register 2.svg 525 × 225; 30 KB
Crc shift register ser.svg 540 × 240; 32 KB
Exemplo flipflop.JPG 892 × 509; 39 KB
Frequencydivider - 20 to 1 - shift register - kgv.png 647 × 396; 8 KB
Frequencydivider - 20 to 1 - shift register.png 665 × 270; 5 KB
Frequencydivider - 4 to 1 - shift register.gif 668 × 239; 5 KB
Frequencydivider - 4 to 1 - shift register.png 668 × 239; 4 KB
Frequencydivider - 5 to 1 - shift register.png 666 × 305; 5 KB
Full shift-register circuit.png 332 × 243; 2 KB
Järjestiksisend-järjestikväljund-nihkeregister.png 3,046 × 656; 49 KB
Järjestiksisend-paralleelväljund-nihkeregister.png 3,056 × 908; 64 KB
MIL MF1702 MD6150 MF2102 and 1402 memories.jpg 1,297 × 854; 532 KB
Overbeck Counter 4bit.svg 640 × 243; 26 KB
Paralleelsisend-järjestikväljund-nihkeregister.png 5,408 × 1,276; 16 KB
Paralleelsisend-paralleelväljund-nihkeregister.png 5,128 × 1,420; 17 KB
PicoBlazeShift.png 415 × 339; 14 KB
PIPO register circuit.png 322 × 178; 2 KB
PIPO register functional symbol.png 138 × 108; 622 bytes
PISO register circuit.png 322 × 196; 2 KB
PISO register functional symbol.png 128 × 108; 554 bytes
Pseudo Random Generator Shiftregister 3Bit.svg 450 × 330; 12 KB
RegDéc SISO SIPO.png 564 × 140; 2 KB
Registre à entrée et sortie série.png 566 × 264; 3 KB
Registre à entrée parallèle et sortie série.png 612 × 210; 2 KB
Registre à entrée série et sortie parallèle.png 575 × 255; 3 KB
Registro paralelo paralelo.JPG 482 × 405; 13 KB
Registro paralelo paralelo.svg 482 × 405; 17 KB
Registro paralelo serie sincrono.JPG 924 × 455; 32 KB
Registro paralelo serie sincrono.svg 924 × 455; 32 KB
Registro paralelo serie.JPG 843 × 518; 45 KB
Registro paralelo serie.svg 843 × 535; 73 KB
Registro serie paralelo.JPG 806 × 259; 23 KB
Registro serie paralelo.svg 820 × 280; 34 KB
Registro serie serie.JPG 897 × 217; 21 KB
Registro serie serie.svg 897 × 217; 25 KB
Ringloendur-inverteeritudtagasiside.png 2,936 × 1,022; 67 KB
Ringloendur-otsetagasiside.png 3,056 × 1,073; 69 KB
Shift reg f.png 809 × 370; 9 KB
Shift Register Circuit with switchable direction.png 725 × 742; 8 KB
Shift register.jpg 1,200 × 1,600; 346 KB
Shift registers based serial SAM.svg 1,169 × 354; 6 KB
Shift wiring.jpg 1,024 × 691; 104 KB
SIPO animated el.gif 800 × 273; 258 KB
SIPO register circuit.png 430 × 280; 2 KB
SIPO register functional symbol.png 138 × 108; 566 bytes
SISO register circuit.png 479 × 145; 1 KB
SISO register functional symbol.png 128 × 108; 498 bytes
Skiftregister sp.png 400 × 256; 5 KB
Skiftregister.png 320 × 256; 4 KB
SRL.svg 512 × 720; 23 KB
State Diagramm of a 3-Bit Shiftregister PSR.svg 682 × 318; 54 KB
State Diagramm of a 3-Bit Shiftregister.svg 682 × 318; 57 KB
State Diagramm of a Johnson Counter.svg 1,202 × 514; 77 KB
State Diagramm of a Shiftregister with Feedback.svg 1,202 × 514; 109 KB
State Diagramm of a Shiftregister with OR Feedback.svg 1,202 × 514; 164 KB
State Diagramm of an Overbeck counter.svg 1,202 × 514; 78 KB
Td5bfig1.png 686 × 136; 15 KB
Three bit shift register.svg 544 × 102; 10 KB
Конфигурация Галуа.jpg 629 × 135; 25 KB

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