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File:CMOS NAND Layout ru.svg

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Description
English: The physical layout of a CMOS NAND circuit. The larger regions of N-type diffusion and P-type diffusion are part of the transistors. The two smaller regions on the left are taps to prevent latchup.
עברית: שער לוגי מסוג NAND ממבט על.
Polski: budowa bramki NAND CMOS.
Română: Aranjamentul fizic al unei porţi NAND CMOS.
中文：CMOS与非门的布图.
Русский: Топология NAND КМОП
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Source This file was derived from: CMOS NAND Layout.svg
Author Jamesm76 at English Wikipedia (original) Vladimir Solovjev (translate)
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Public domain This work has been released into the public domain by its author, Jamesm76 at English Wikipedia. This applies worldwide.
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current11:21, 21 March 2024Thumbnail for version as of 11:21, 21 March 2024294 × 587 (15 KB)Vladimir Solovjev (talk | contribs){{Information |Description={{en|The physical layout of a CMOS NAND circuit. The larger regions of N-type diffusion and P-type diffusion are part of the transistors. The two smaller regions on the left are taps to prevent latchup.}} {{he|שער לוגי מסוג NAND ממבט על.}} {{pl|budowa bramki NAND CMOS.}} {{ro|Aranjamentul fizic al unei porţi NAND CMOS.}} {{zh|CMOS与非门的布图.}} {{ru|Топология NAND КМОП}} |Source={{derived from|CMOS NAND Layout.svg}} |Date=2024-03-21 |Author={{user at project|Jamesm76|wik...

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