File:Eye pattern diagram 4 spartan6 2012 05 12.jpg
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English: eye pattern of a serial IO (SERDES) of a Xilinx Spartan 6 FPGA - optimized by dual sided passive termination and hot spot active termination / over shot protection as well es controlled impedance manufacturing
Deutsch: Augendiagramm eines Spartan 6 SERDES - Ausgangs auf einer Leitung mit kontrollierter Impedanz, mit beidseitiger passiver R-R-Terminierung und aktiver Terminierung / Überlauf-Protektion am Einspeisepunkt |
| Date | |
| Source | Own work |
| Author | Hardwareonkel |
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 11:55, 12 June 2012 | | 1,500 × 700 (30 KB) | Hardwareonkel (talk | contribs) |
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