File:Pier2.3 logic board back.jpg
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Summary
editDescriptionPier2.3 logic board back.jpg |
English: Back side of the main logic board of a Pier2.3 iris scanner |
Date | |
Source | Own work |
Author | Phiarc |
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Annotations InfoField | This image is annotated: View the annotations at Commons |
RTL8139 10/100 Mbit/s Ethernet NIC with PCI interface
2x Samsung K4S511632B-TC75 512 Mbit SDRAM chips, giving the system a main memory capacity of 128 MB.
Texas Instruments TSC2003 four-wire resistive touchscreen controller
Microchip 93LC46B 1 Kbit serial EEPROM. According to the RTL8139 datasheet, this contains basic parameters for the chip, like the PCI VID/PID, power and configuration registers.
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Date/Time | Thumbnail | Dimensions | User | Comment | |
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current | 14:15, 28 January 2023 | 7,504 × 12,021 (29.91 MB) | Phiarc (talk | contribs) | Uploaded own work with UploadWizard |
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JPEG file comment | 3x stitch |
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