File:A CMOS current-mode full-adder cell for multi-valued logic VLSI (IA acmoscurrentmode109457557).pdf
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A CMOS current-mode full-adder cell for multi-valued logic VLSI ( ) | |
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Author |
Barton, Robert James |
Title |
A CMOS current-mode full-adder cell for multi-valued logic VLSI |
Publisher |
Monterey, California. Naval Postgraduate School |
Description |
This thesis describes the design and implementation of a carry save adder cell for multivalued logic VLSI. A four valued system was chosen and the logic was analyzed and minimized using the HAMLET CAD tool. SPICE was used to design and simulate the required behavior of the current mode CMOS circuits. A VLSI test and evaluation integrated circuit was implemented with MAGIC and fabricated through the MOSIS service. The completed IC was tested and evaluated using a specially designed binary to multivalued logic converter and decoder. Engineering modifcations to the original current mode inverter cells used by HAMLET were made leading to significant power savings in a complete design. The fabricated device performed as predicted by SPICE simulation. Exhaustive functional testing produced correct steady-state output signals for all cases of input loadings. Finally, we show HAMLET minimization heuristics are not efficient in the design of adder cells by comparison with an alternative modulo 4 carry save adder cell in current mode CMOS. Subjects: |
Language | English |
Publication date |
September 1995 publication_date QS:P577,+1995-09-00T00:00:00Z/10 |
Current location |
IA Collections: navalpostgraduateschoollibrary; fedlink |
Accession number |
acmoscurrentmode109457557 |
Source | |
Permission (Reusing this file) |
This publication is a work of the U.S. Government as defined in Title 17, United States Code, Section 101. As such, it is in the public domain, and under the provisions of Title 17, United States Code, Section 105, may not be copyrighted. |
Licensing edit
Public domainPublic domainfalsefalse |
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This file has been identified as being free of known restrictions under copyright law, including all related and neighboring rights. |
https://creativecommons.org/publicdomain/mark/1.0/PDMCreative Commons Public Domain Mark 1.0falsefalse
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Short title | A CMOS current-mode full-adder cell for multi-valued logic VLSI |
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Author | Barton, Robert James |
Date and time of digitizing | 02:42, 21 June 2012 |
Software used | EPSON GT-S80 |
File change date and time | 02:56, 21 June 2012 |
Date metadata was last modified | 02:56, 21 June 2012 |
Conversion program | Adobe Acrobat 9.51 Paper Capture Plug-in |
Encrypted | no |
Page size |
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Version of PDF format | 1.4 |